Miniaturization of semiconductor devices continues to be an important goal for the semiconductor industry. However, semiconductor devices, e.g., bipolar transistors, present ongoing challenges to semiconductor manufacturers in achieving this miniaturization while meeting increased component densification objectives. As devices continue to shrink, there is also a concurrent need for increased component densification. Achieving both of these objectives is not always straight forward in that each objective often requires implementing complex solutions or processes that affect the other.
For example, vertical PNP (VPNP) bipolar transistors typically include a sinker region, e.g., a PTUB (a p-type doped tub) located adjacent the collector. The PTUB design rules are typically large (e.g., 1.6 microns). Consequently, the collector-base breakdown can be limited by the PTUB to base contact space. Thus, in those designs where an optimum emitter base breakdown voltage (Bvcbo) is desired, a relatively large distance needs to separate the PTUB and the base contact. These large design requirements cause the device to take up excessive space on the chip. Further, VPNP devices often include n-isolation regions located under the collector. Since the n-isolation junction has to isolate the PNP collector from the p-substrate, the large sizes associated with this structure and its isolation scheme increases the collector-substrate capacitance.
To combat this, the industry could use a special purpose p-sinker mask and implant that has tighter design rules. However this is not suitable for all applications because of the extra processing costs associated with this solution. Thus, this particular solution is applicable in only a limited number of designs.
Alternatively, a deep trench isolation process on thick silicon-on-insulator (SOI) wafers can be used to isolate the collector from the p-substrate and sharply reduce the collector-substrate capacitance. However, the deep trench process is fairly expensive in that it includes at least one extra mask, two extra etches, a deposition, and a chemical/mechanical planarization step. Moreover, this option still requires the p-sinker mask and implant (which may be a PTUB). The PTUB size and space to base contact still limits the PNP size.
Accordingly, there is a need to provide a process and device by which the overall size of a VPNP bipolar transistor can be reduced without significant productions costs, production time or an increase in capacitance.